The present invention generally relates to microwave monolithic integrated circuit devices (hereinafter simply referred to as MMIC devices), and more particularly to an MMIC device which can be miniaturized and produced by simple processes.
Conventionally, an MMIC device includes a transistor and a capacitor for impedance matching. The capacitor includes a lower electrode layer, a dielectric layer and an upper electrode layer which are successively formed on a substrate. The transistor is formed on the same substrate as the capacitor, but the transistor and the capacitor are respectively formed by independent processes. For this reason, problems result due to the large number of processes required to produce the MMIC device which are complex. On the other hand, because it is difficult to accurately control the thickness of the dielectric layer, it is difficult to accurately control the capacitance of the capacitor.
Accordingly, in order to eliminate these problems, it is possible to form a first comb-shaped electrode layer and a second comb-shaped electrode layer on a substrate so that end surfaces, that is, teeth, of the first and second comb-shaped electrode layers mutually oppose each other by a predetermined separation. In this case, a capacitor is formed across a tooth of the first comb-shaped electrode layer and a corresponding tooth of the second comb-shaped electrode layer, and the capacitance of this capacitor can be controlled more accurately compared to the three-layer capacitor previously described. In addition, processes for forming a capacitor of this type are simple compared to those for forming a three-layer capacitor. However, in this case, the area occupied by the capacitor becomes extremely large, and it is impossible to miniaturize the MMIC device. Furthermore, since the transistor and the capacitor of the MMIC device are respectively formed by independent processes, it is impossible to simplify the processes of producing the MMIC device.
On the other hand, a field-effect semiconductor device was previously proposed in a U.S. patent application Ser. No. 508,545 filed June 28, 1983, in which the assignee is the same as the assignee of the present application. The previously proposed semiconductor device includes a substrate having a through-hole, a through-hole electrode formed within the through-hole and on the lower surface of the substrate, a dielectric layer formed on the upper surface of the substrate at a position where the through-hole electrode is exposed, a source electrode layer formed on the dielectric layer, and a gate electrode layer and a drain electrode layer are respectively formed on the substrate. A capacitor is formed across the source electrode layer and the through-hole electrode. According to this previously proposed semiconductor device, the dielectric layer is first formed on the upper surface of the substrate, and the through-hole is formed by an etching process using a reactive gas that stops the etching from the lower surface of the substrate at the dielectric layer. Then, the dielectric layer is patterned by an etching process in accordance with a desired capacitance, and the source electrode layer is formed on the patterned dielectric layer. Hence, in addition to processes for forming a field-effect transistor (FET) on the substrate, it is necessary to perform additional processes for forming the capacitor, such as processes for forming the dielectric layer which is not required by the FET and patterning the dielectric layer by etching. As a result, it is impossible to effectively simplify the processes of producing the semiconductor device. Moreover, when the dielectric layer is patterned by the etching, there is a problem in that surfaces of remaining parts on the substrate, e.g., the FET, are damaged by etching.